Part Number Hot Search : 
HFU15H MCM6709R ON0782 RT424524 IRF78 AY03L DA3674A D45H8
Product Description
Full Text Search
 

To Download HCTS240AMS Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
 HCTS240AMS
September 1995
Radiation Hardened Octal Buffer/Line Driver, Three-State
Pinouts
20 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T20, LEAD FINISH C TOP VIEW
1 OE 1 A0 2 Y3 1 A1 2 Y2 1 A2 2 Y1 1 A3 2 Y0 1 2 3 4 5 6 7 8 9 20 VCC 19 2 OE 18 1 Y0 17 2 A3 16 1 Y1 15 2 A2 14 1 Y2 13 2 A1 12 1 Y3 11 2 A0
Features
* 3 Micron Radiation Hardened CMOS SOS * Total Dose 200K RAD (Si) * SEP Effective LET No Upsets: >100 MEV-cm2/mg * Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/ Bit-Day (Typ) * Dose Rate Survivability: >1 x 1012 RAD (Si)/s * Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse * Latch-Up Free Under Any Conditions * Military Temperature Range: -55oC to +125oC * Significant Power Reduction Compared to LSTTL ICs * DC Operating Voltage Range: 4.5V to 5.5V * LSTTL Input Compatibility - VIL = 0.8V Max - VIH = VCC/2 Min * Input Current Levels Ii 5A at VOL, VOH
GND 10
20 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE (FLATPACK) MIL-STD-1835 CDFP4-F20, LEAD FINISH C TOP VIEW
1 OE 1 A0 2 Y3 1 A1 2 Y2 1 A2 2 Y1 1 A3 2 Y0 GND 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VCC 2 OE 1 Y0 2 A3 1 Y1 2 A2 1 Y2 2 A1 1 Y3 2 A0
Description
The Intersil HCTS240AMS is a Radiation Hardened inverting octal buffer/line driver, three-state, with two active low output enables (1OE, 2OE). 1OE controls outputs 1Yn, 2OE controls outputs 2Yn. The HCTS240AMS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family . The HCTS240AMS is supplied in a 20 lead Ceramic flatpack (K suffix) or a SBDIP Package (D suffix).
Ordering Information
PART NUMBER HCTS240ADMSR HCTS240AKMSR HCTS240AD/Sample HCTS240AK/Sample HCTS240AHMSR TEMPERATURE RANGE -55oC to +125oC -55oC to +125oC +25oC +25oC +25oC SCREENING LEVEL Intersil Class S Equivalent Intersil Class S Equivalent Sample Sample Die PACKAGE 20 Lead SBDIP 20 Lead Ceramic Flatpack 20 Lead SBDIP 20 Lead Ceramic Flatpack Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright (c) Intersil Corporation 1999
Spec Number File Number
1
518889 2105.2
HCTS240AMS Functional Diagram
1Y0 18 1Y1 16 1Y2 14 1Y3 12 2Y0 9 2Y1 7 2Y2 5 2Y3 3
N
P
N
P
N
P
N
P
P
N
P
N
P
N
P
N
1 1OE
2 1A0 1A1
4 1A2
6
8 1A3
11 2A0
13 2A1
15 2A2
17 2A3
19 2OE
TRUTH TABLE INPUTS 1OE, 2OE L L H H = High Voltage Level L = Low Voltage Level X = Immaterial Z = High Impedance A L H X OUTPUT Y H L Z
Spec Number 2
518889
Specifications HCTS240AMS
Absolute Maximum Ratings
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .10mA DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . .35mA (All Voltage Reference to the VSS Terminal) Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . . +265oC Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Reliability Information
Thermal Resistance JA JC SBDIP Package. . . . . . . . . . . . . . . . . . . . 72oC/W 24oC/W Ceramic Flatpack Package . . . . . . . . . . . 107oC/W 28oC/W Maximum Package Power Dissipation at +125oC Ambient SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.69W Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.47W If device power exceeds package dissipation capability, provide heat sinking or derate linearly at the following rate: SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.9mW/oC Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . 9.3mW/oC
CAUTION: As with all semiconductors, stress listed under "Absolute Maximum Ratings" may be applied to devices (one at a time) without resulting in permanent damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed under "Electrical Performance Characteristics" are the only conditions recommended for satisfactory device operation.
Operating Conditions
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V Input Rise and Fall Times at 4.5V VCC (TR, TF) . . . . . . .100ns Max Operating Temperature Range (TA) . . . . . . . . . . . . -55oC to +125oC Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . . . . . . . 0.0V to 0.8V Input High Voltage (VIH) . . . . . . . . . . . . . . . . . . . . . VCC to VCC/2V
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS 1 2, 3 Output Current (Sink) IOL VCC = 4.5V, VIH = 4.5V, VOUT = 0.4V, VIL = 0V, (Note 2) VCC = 4.5V, VIH = 4.5V, VOUT = VCC - 0.4V, VIL = 0V, (Note 2) VCC = 4.5V, VIH = 2.25V, IOL = 50A, VIL = 0.8V VCC = 5.5V, VIH = 2.75V, IOL = 50A, VIL = 0.8V Output Voltage High VOH VCC = 4.5V, VIH = 2.25V, IOH = -50A, VIL = 0.8V VCC = 5.5V, VIH = 2.75V, IOH = -50A, VIL = 0.8V Input Leakage Current IIN VCC = 5.5V, VIN = VCC or GND 1 2, 3 1 2, 3 1, 2, 3 LIMITS TEMPERATURE +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC, +125oC, -55oC MIN 7.2 6.0 -7.2 -6.0 MAX 40 750 0.1 UNITS A A mA mA mA mA V
PARAMETER Supply Current
SYMBOL ICC
(NOTE 1) CONDITIONS VCC = 5.5V, VIN = VCC or GND
Output Current (Source)
IOH
Output Voltage Low
VOL
1, 2, 3
-
0.1
V
1, 2, 3
VCC -0.1 VCC -0.1 -
-
V
1, 2, 3
0.5 5.0 1 50 -
V A A A A V
1 2, 3
Three-State Output Leakage Current
IOZ
VCC = 5.5V, Applied Voltage = 0V or VCC VCC = 4.5V, VIH = 2.25V, VIL = 0.8V (Note 3)
1 2, 3 7, 8A, 8B
Noise Immunity Functional Test NOTES:
FN
1. All voltages referenced to device GND. 2. Force/measure functions may be interchanged. 3. For functional tests, VO 4.0V is recognized as a logic "1", and VO 0.5V is recognized as a logic "0". 4. Due to tester noise at -55oC VIH is increased 200mV.
Spec Number 3
518889
Specifications HCTS240AMS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS 9 10, 11 9 10, 11 9 10, 11 9 10, 11 9 10, 11 9 10, 11 LIMITS TEMPERATURE +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC MIN 2 2 2 2 2 2 2 2 2 2 2 2 MAX 22 25 20 23 30 35 22 25 23 26 21 23 UNITS ns ns ns ns ns ns ns ns ns ns ns ns
PARAMETER Propagation Delay Input to Output
SYMBOL TPHL
(NOTES 1, 2) CONDITIONS VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V
TPLH
Propagation Delay Enable to Output
TPZL
TPZH
Propagation Delay Disable to Output
TPLZ
TPHZ
NOTES: 1. All voltages referenced to device GND. 2. AC measurements assume RL = 500, CL = 50pF, Input tr = tf = 3ns, VIL = GND, VIH = 3V.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (NOTE 1) CONDITIONS VCC = 5.0V, VIH = 5.0V, VIL = 0V, f = 1MHz VCC = 5.0V, VIH = 5.0V, VIL = 0V, f = 1MHz VCC = 5.0V, VIH = 5.0V, VIL = 0V, f = 1MHz LIMITS TEMPERATURE +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC MIN MAX 135 150 10 10 20 20 UNITS pF pF pF pF pF pF
PARAMETER Capacitance Power Dissipation
SYMBOL CPD
Input Capacitance
CIN
Output Capacitance
COUT
NOTE: 1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics.
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS 200K RAD LIMITS TEMPERATURE +25oC +25oC +25oC MIN 6.0 -6.0 MAX 0.75 UNITS mA mA mA
PARAMETER Supply Current Output Current (Sink) Output Current (Source)
SYMBOL ICC IOL IOH
(NOTE 1) CONDITIONS VCC = 5.5V, VIN = VCC or GND VCC = VIH = 4.5V, VOUT = 0.4V, VIL = 0V VCC = VIH = 4.5V, VOUT = VCC -0.4V, VIL = 0V
Spec Number 4
518889
Specifications HCTS240AMS
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) 200K RAD LIMITS TEMPERATURE +25oC +25oC +25oC +25oC +25oC +25 C +25oC +25oC +25oC +25oC +25oC +25oC +25oC
o
PARAMETER Output Voltage Low
SYMBOL VOL
(NOTE 1) CONDITIONS VCC = 4.5V, VIH = 2.25V, VIL = 0.8V , IOL = 50A VCC = 5.5V, VIH = 2.75V, VIL = 0.8V , IOL = 50A
MIN VCC -0.1 VCC -0.1 2 2 2 2 2 2
MAX 0.1 0.1 5 50 25 23 35 25 26 23
UNITS V V V V A A V ns ns ns ns ns ns
Output Voltage High
VOH
VCC = 4.5V, VIH = 2.25V, VIL = 0.8V, IOH = -50A VCC = 5.5V, VIH = 2.75V, VIL = 0.8V, IOH = -50A
Input Leakage Current Three-State Output Leakage Current Noise Immunity Functional Test Propagation Delay Input to Output Propagation Delay Enable to Output Propagation Delay Disable to Output NOTES:
IIN IOZ FN TPHL TPLH TPZL TPZH TPLZ TPHZ
VCC = 5.5V, VIN = VCC or GND VCC = 5.5V, Force Voltage = 0V or VCC VCC = 4.5V, VIH = 2.25V, VIL = 0.8V, (Note 2) VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V VCC = 4.5V, VIH = 3.0V, VIL = 0V
1. All voltages referenced to device GND. 2. For functional tests VO 4.0V is recognized as a logic "1", and VO 0.5V is recognized as a logic "0".
TABLE 5. DELTA PARAMETERS (+25oC) GROUP B SUBGROUP 5 5 5
PARAMETER ICC IOZ IOL/IOH
DELTA LIMIT 12A 200nA -15% of 0 Hour
TABLE 6. APPLICABLE SUBGROUPS CONFORMANCE GROUPS Initial Test (Preburn-In) Interim Test I (Postburn-In) Interim Test II (Postburn-In) PDA Interim Test III (Postburn-In) PDA Final Test Group A (Note 1) METHOD 100%/5004 100%/5004 100%/5004 100%/5004 100%/5004 100%/5004 100%/5004 Sample/5005 GROUP A SUBGROUPS 1, 7, 9 1, 7, 9 1, 7, 9 1, 7, 9, Deltas 1, 7, 9 1, 7, 9, Deltas 2, 3, 8A, 8B, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11 ICC, IOL/H, IOZL/H READ AND RECORD ICC, IOL/H, IOZL/H ICC, IOL/H, IOZL/H ICC, IOL/H, IOZL/H
Spec Number 5
518889
Specifications HCTS240AMS
TABLE 6. APPLICABLE SUBGROUPS CONFORMANCE GROUPS Group B Subgroup B-5 Subgroup B-6 Group D NOTE: 1. Alternate group A inspection in accordance with Method 5005 of MIL-STD-883 may be exercised. METHOD Sample/5005 Sample/5005 Sample/5005 GROUP A SUBGROUPS 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas 1, 7, 9 1, 7, 9 READ AND RECORD Subgroups 1, 2, 3, 9, 10, 11
TABLE 7. TOTAL DOSE IRRADIATION CONFORMANCE GROUPS Group E Subgroup 2 NOTE: 1. Except FN test which will be performed 100% Go/No-Go. TEST METHOD 5005 PRE RAD 1, 7, 9 POST RAD Table 4 READ AND RECORD PRE RAD 1, 9 POST RAD Table 4 (Note 1)
TABLE 8. STATIC AND DYNAMIC BURN-IN TEST CONNECTIONS OSCILLATOR OPEN GROUND 1/2 VCC = 3V 0.5V VCC = 6V 0.5V 50kHz 25kHz
STATIC BURN-IN I TEST CONNECTIONS (Note 1) 3, 5, 7, 9, 12, 14, 16, 18 1, 2, 4, 6, 8, 10, 11, 13, 15, 17, 19 20 -
STATIC BURN-IN II TEST CONNECTIONS (Note 1) 3, 5, 7, 9, 12, 14, 16, 18 10 1, 2, 4, 6, 8, 11, 13, 15, 17, 19, 20 -
DYNAMIC BURN-IN TEST CONNECTIONS (Note 2) 1, 10, 19 3, 5, 7, 9, 12, 14, 16, 18 20 2, 4, 6, 8, 11, 13, 15, 17 -
NOTES: 1. Each pin except VCC and GND will have a resistor of 10K 5% for static burn-in 2. Each pin except VCC and GND will have a resistor of 680 5% for dynamic burn-in
TABLE 9. IRRADIATION TEST CONNECTIONS OPEN 3, 5, 7, 9, 12, 14, 16, 18 GROUND 10 VCC = 5V 0.5V 1, 2, 4, 6, 8, 11, 13, 15, 17, 19, 20
NOTE: Each pin except VCC and GND will have a resistor of 47K 5% for irradiation testing. Group E, Subgroup 2, sample size is 4 dice/wafer 0 failures.
Spec Number 6
518889
HCTS240AMS Intersil Space Level Product Flow - `MS'
Wafer Lot Acceptance (All Lots) Method 5007 (Includes SEM) GAMMA Radiation Verification (Each Wafer) Method 1019, 4 Samples/Wafer, 0 Rejects 100% Nondestructive Bond Pull, Method 2023 Sample - Wire Bond Pull Monitor, Method 2011 Sample - Die Shear Monitor, Method 2019 or 2027 100% Internal Visual Inspection, Method 2010, Condition A 100% Temperature Cycle, Method 1010, Condition C, 10 Cycles 100% Constant Acceleration, Method 2001, Condition per Method 5004 100% PIND, Method 2020, Condition A 100% External Visual 100% Serialization 100% Initial Electrical Test (T0) 100% Static Burn-In 1, Condition A or B, 24 hrs. min., +125oC min., Method 1015 100% Interim Electrical Test 1 (T1) 100% Delta Calculation (T0-T1) 100% Static Burn-In 2, Condition A or B, 24 hrs. min., +125oC min., Method 1015 100% Interim Electrical Test 2 (T2) 100% Delta Calculation (T0-T2) 100% PDA 1, Method 5004 (Notes 1and 2) 100% Dynamic Burn-In, Condition D, 240 hrs., +125oC or Equivalent, Method 1015 100% Interim Electrical Test 3 (T3) 100% Delta Calculation (T0-T3) 100% PDA 2, Method 5004 (Note 2) 100% Final Electrical Test 100% Fine/Gross Leak, Method 1014 100% Radiographic, Method 2012 (Note 3) 100% External Visual, Method 2009 Sample - Group A, Method 5005 (Note 4) 100% Data Package Generation (Note 5)
NOTES: 1. Failures from Interim electrical test 1 and 2 are combined for determining PDA 1. 2. Failures from subgroup 1, 7, 9 and deltas are used for calculating PDA. The maximum allowable PDA = 5% with no more than 3% of the failures from subgroup 7. 3. Radiographic (X-Ray) inspection may be performed at any point after serialization as allowed by Method 5004. 4. Alternate Group A testing may be performed as allowed by MIL-STD-883, Method 5005. 5. Data Package Contents: * Cover Sheet (Intersil Name and/or Logo, P.O. Number, Customer Part Number, Lot Date Code, Intersil Part Number, Lot Number, Quantity). * Wafer Lot Acceptance Report (Method 5007). Includes reproductions of SEM photos with percent of step coverage. * GAMMA Radiation Report. Contains Cover page, disposition, Rad Dose, Lot Number, Test Package used, Specification Numbers, Test equipment, etc. Radiation Read and Record data on file at Intersil. * X-Ray report and film. Includes penetrometer measurements. * Screening, Electrical, and Group A attributes (Screening attributes begin after package seal). * Lot Serial Number Sheet (Good units serial number and lot number). * Variables Data (All Delta operations). Data is identified by serial number. Data header includes lot number and date of test. * The Certificate of Conformance is a part of the shipping invoice and is not part of the Data Book. The Certificate of Conformance is signed by an authorized Quality Representative.
Spec Number 7
518889
HCTS240AMS Propagation Delay Timing Diagrams
VIH VS VSS TPLH TPHL VOH VS VOL OUTPUT CL = 50pF RL = 500 INPUT CL RL
Propagation Delay Load Circuit
DUT TEST POINT
VOLTAGE LEVELS PARAMETER VCC VIH VS VIL GND HCTS 4.50 3.00 1.30 0 0 UNITS V V V V V
Three-State Low Timing Diagrams
VIH VS VSS TPZL TPLZ VOZ VT VOL OUTPUT VW INPUT
Three-State Low Load Circuit
VCC
RL TEST POINT CL
DUT
CL = 50pF RL = 500
THREE-STATE LOW VOLTAGE LEVELS PARAMETER VCC VIH VS VT VW GND HCTS 4.50 3.00 1.30 1.30 0.90 0 UNITS V V V V V V
Spec Number 8
518889
HCTS240AMS Three-State High Timing Diagrams
VIH VS SS TPZH TPHZ VOH VT VOZ OUTPUT VW CL = 50pF RL = 500 CL RL INPUT
Three-State High Load Circuit
DUT TEST POINT
THREE-STATE HIGH VOLTAGE LEVELS PARAMETER VCC VIH VS VT VW GND HCTS 4.50 3.00 1.30 1.30 3.60 0 UNITS V V V V V V
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (321) 724-7000 FAX: (321) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. Taiwan Limited 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029
Spec Number 9
518889
HCTS240AMS Die Characteristics
DIE DIMENSIONS: 106mils x 108mils 2.68mm x 2.74mm METALLIZATION: Type: SiAl Metal Thickness: 11kA 1kA GLASSIVATION: Type: SiO2 Thickness: 13kA 2.6kA WORST CASE CURRENT DENSITY: <2.0 x 105A/cm2 BOND PAD SIZE: 100m x 100m 4 mils x 4 mils
Metallization Mask Layout
HCTS240AMS
(2) 1 A0 (3) 2 Y3 (19) 2 OE (20) VCC (1) 1 OE
(18) 1 Y0
1 A1 (4) (17) 2 A3 2 Y2 (5)
(16) 1 Y1
1 A2 (6) (15) 2 A2
2 Y1 (7) (14) 1 Y2
1 A3 (8)
2 A0 (11)
NOTE: The die diagram is a generic plot from a similar HCS device. It is intended to indicate approximate die size and bond pad location. The mask series for the HCTS240A is TA14400B.
GND (10)
2 A1 (13)
1 Y3 (12)
2 Y0 (9)
Spec Number 10
518889


▲Up To Search▲   

 
Price & Availability of HCTS240AMS

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X